The present invention relates to the field of pulse width modulation (PWM), and, more particularly, to a circuit for controlling the current flowing in a winding driven in PWM mode through a full-bridge stage.
In a PWM switching regulator, a square wave drives the control terminal of a switch of a full-bridge stage determining its ON or off state. Alternating conduction states to nonconduction states, the load driven by the full-bridge stage will be either crossed by a current or not whose mean value during a turn-on and a turn-off phase can be controlled by varying the duty cycle of the driving square wave.
A particularly effective method of controlling a full-bridge is the one disclosed in U.S. Pat. No. 5,917,720 issued to the same assignee. A block diagram of a circuit implementing the method, including by a control loop of the PWM driver at a constant frequency, is depicted in FIG. 1. The point of interest of this method is that the current flowing in the load is controlled by varying the respective duty cycle of the two outputs OUT+ and OUTxe2x88x92 of the power stage Power_Ampl. By increasing the duty cycle of the output OUT+ and by decreasing the duty cycle of the output OUTxe2x88x92 or vice versa, a current having direction and intensity that depend on the difference between the duty cycles of the outputs is forced in the load.
The current is controlled by detecting the voltage drop on a current sensing resistance connected in series to the winding to be controlled, amplifying this voltage drop with an operational amplifier Sense_Ampl that produces a feedback voltage, and closing the feedback loop with the amplifier Error_Ampl, that compares the feedback voltage with a reference value representing the desired current value. The output Err_Out of the amplifier Error_Ampl is compared with two reference triangular wave signals Tria1 and Tria2 of opposite phases thus generating the two driving signals In+ and Inxe2x88x92 of the power stage.
An important aspect of such a system is that the two signals Tria1 and Tria2 of opposite phase must be precisely generated with the same amplitude and with a mean value equal to the reference voltage Vref to which the Sense_Ampl and the Error_Ampl are referred. This is not easy to achieve because of the offset of the operational amplifiers that make the generation of the two triangular wave oscillating signals critical and very often the two signals are not perfectly symmetrical and do not have the same mean value Vref.
This results in a degradation of the performance of the current control when operating at low currents and particularly when controlling at null current. In fact in that situation, by setting the input voltage Vctl equal to the reference voltage Vref, the output Err_Out of the Error_Ampl tends to equal Vref. However, because of asymmetries and unbalances of the two triangular wave references, the two driving signals of the power stage In+ and Inxe2x88x92 do not result perfectly in phase and do not have the same duty cycle and so the differential voltage applied to the load is not null, but assumes a value proportional to the difference between the two triangular wave voltage references.
It is evident that there is a need for a PWM current control circuit that prevents such a degradation of the control at a relatively low level of current in the load.
It is an object of the present invention to provide a partly analog and partly digital circuit controlling, through a feedback loop, the current flowing in a winding of an induction machine, such as a DC motor or a Voice Coil Motor, that overcomes the drawback of known circuits. The current flowing in the load is delivered by a full-bridge stage driven by a PWM digital converter.
More precisely, the invention includes a feedback control circuit of the current flowing in a load formed by a winding in series to a current sensing resistor. The circuit comprises an output full-bridge stage, driven by a pair of first and second control signals. The circuit may also include an amplifier having a noninverting and an inverting input respectively coupled to the terminals of the current sensing resistor for producing an amplified replica of the voltage drop on the sensing resistor. The circuit may also include a controller coupled to the output of the amplifier and to a reference voltage representing a desired value of the current in the load for producing a correction signal. In addition, the circuit may include a PWM converter coupled to the output of the controller and to a clock signal for generating the pair of control signals.
The point of interest of the control circuit of the invention includes the structure of the PWM converter that comprises an up/down counter fed with the clock signal, producing a certain count, combinatory logic circuitry coupled to the output of the controller producing a signal that is the twos-complement of the correction signal, and a pair of first and second registers coupled to the outputs of the controller and of the combinatory logic circuitry, respectively. Also, a first comparator is coupled to the outputs of the counter and of the first register for producing the first control signal if the count exceeds the value stored in the first register. A second comparator is coupled to the counter and to the second register for producing the second control signal if the count overcomes the value stored in the second register. According to a preferred embodiment of the invention the controller can be realized by an adder coupled to the reference voltage and to the output of the amplifier producing an error signal, and a correction filter coupled to the output of the adder, producing the correction signal.